This invention relates to voltage controlled surface acoustic wave oscillators, and in particular, to cost-effective packaged configurations for relatively high-frequency surface acoustic wave controlled-frequency oscillators.
High capacity data networks rely on signal repeaters and sensitive receivers for low-error data transmission. To decode and/or cleanly retransmit a serial data signal, such network components include components for creating a data timing signal having the same phase and frequency as the data signal. This step of creating a timing signal has been labeled xe2x80x9cclock recovery.xe2x80x9d
Data clock recovery requires a relatively high purity reference signal to serve as a starting point for matching the serial data signal clock rate and also requires circuitry for frequency adjustment. The type, cost and quality of the technology employed to generate the high purity reference signal varies according to the class of data network application. For fixed large-scale installations, an xe2x80x9catomicxe2x80x9d clock may serve as the ultimate source of the reference signal. For remote or movable systems, components including specially configured quartz resonators have been used. As communication network technology progresses towards providing higher bandwidth interconnections to local area networks and computer workstations, the need has grown for smaller and less-expensive clock recovery technology solutions.
For many clock recovery applications, the reference signal generator must be adjustable, i.e., controllable, over a precisely defined operating curve. This adjustability requirement is conveniently defined as an Absolute Pull Range (APR). APR is defined as the controllable frequency deviation (specified in +ppm) from the nominal frequency (F0) over a wide range of operating parameters, including supply voltage variations, temperature variations, output load variations, and time (i.e., aging). Clock recovery may require controllable oscillators having both a minimum and a maximum APR.
For higher frequency applications now in demand, e.g., above 500 MHz, more conventional resonator technologies such as standard AT-cut crystals have not been fully successful. The recognized upper limit for fundamental-mode, straight blank AT-cut crystals is about 70 MHz.
There continues to be a need for a cost-effective voltage controlled oscillator suitable for data signal clock recovery applications. In particular, there remains a need for lower cost SAW oscillator components. Most communicating devices employing clock recovery oscillators are produced in automated factories in mass volumes. The associated market favors smaller designs and consumer-level pricing. Towards these objectives rigorous attention is applied to electronic component costs and sizes. Cost and size constraints are important factors in crystal oscillator design.
Because even dust-size contamination of SAW resonators affects center frequencies, packaging and handling for SAW oscillator components is critical. SAW based oscillators are assembled in clean room environments, where the SAW resonator is sealed or encapsulated such that a chamber is formed over the active surface of the SAW substrate. Inert, dust-free atmospheres are created in the sealed SAW resonator chamber. These special packaging and handling requirements not only contribute to the cost of manufacturing oscillator components but also limit efforts at reducing the overall package size.
A controllable oscillator suitable for use in digital signal clock synchronization is provided. The controllable oscillator comprises a SAW oscillator circuit for generating an analog controlled-frequency output signal, a sinewave-to-logic level translator circuit, and a double-sided package.
The SAW oscillator circuit includes a voltage-variable control input for adjusting a frequency of the controlled-frequency output signal, a voltage variable capacitive element responsive to the control input, a surface acoustic wave (SAW) resonator operably linked to the voltage variable capacitive element, and a gain stage for energizing the SAW resonator.
A sinewave-to-logic level translator circuit is operably linked to the SAW oscillator circuit for generating a digital logic output signal having substantially the same frequency as the controlled-frequency output signal.
The SAW oscillator circuit and translator circuit are configured on a double-sided package including a platform having a central portion and an outer portion. Sidewalls extend substantially upwardly and substantially downwardly from the outer portion of the platform. The upwardly extending sidewalls and the platform form a first cavity adapted to receive and electrically connect the SAW resonator. The downwardly extending sidewalls and the platform form a second cavity adapted to receive and electrically connect at least one electronic component. A cover is coupled with the first cavity to define a hermetic environment for containing the SAW resonator.
The packaged oscillator preferably also includes a laminate substrate coupled with the second cavity. In this preferred embodiment, the package platform has a second-cavity side with at least one electronic component mounted on this second-cavity side. The laminate substrate cover has a cavity facing side to receive at least one electronic component and an outward facing side which includes contacts to facilitate surface mounting.
There are other advantages and features of this invention which will be more readily apparent from the following detailed description of the preferred embodiment of the invention, the drawings, and the appended claims.